They asked mostly about my current work,my roles, challenges etc. they asked about SV constraints,scoreboard, and some C related queries.
Verification Engineer Interview Questions
2,565 verification engineer interview questions shared by candidates
The interviewer asked some verification questions - those were nice; but then he also asked a software (i.e "cracking the coding interview") type of question. I'm not a Software Engineer
describe your strength and weakness
General question about past digital design and verification experiences. General question about oops
SV constraint writing UVM TB writing
Digital Design - critical path, bit manipulation, logic questions, hardware design for your code using adders and gates Verification - assertions, constraints, coverage, OOPs (they will dig into this) virtual functions, polymorphism
How would you sort 10 integers in ascending order?
AI questions included about auto encoders, lstms, basics of neural network, convolutional neural networks etc.
1. Explain Channel length modulation 2. Explain body effect 3. Non idealities of MOS capacitance
All kinds of questions regarding Op-Amp My own research ADC/DAC, INL/DNL, distortion, etc. CMOS, Bipolar device basics (operation regions, I-V curve, equations, noise, etc)
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