What's the disadvantage of having a cache with more associativity?
Verification Engineer Interview Questions
2,558 verification engineer interview questions shared by candidates
How many flip flops are required for the clock devide by 3 counter
Coding problem was a graph algorithm related one to be resolved in an hour on a video call with several engineer on the other side providing feedback
Synchronize two systems with different clocks? Write code verilog
implement a machine that count number of 1's in a 8 bit input
1 is heavier than the other 5 marbles among 6 mables . given a weight to find the heavier one.
What are the five stages of a classic RISC pipeline?
explain setup and hold time with figure and some example and then interviewer added some circuitry and asked to solver setup and hold violation in circut
2. Generate two arrays of length 10, whose elements are unique to each? Later he explained that all the 20 elements in both the arrays should be unique
The questions were : write a SV code to get unique random numbers, rand vs randc, write driver code etc.
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