Then asks questions in SV & UVM starting from basic concepts to transaction level modelling & even asks you to develop a UVC for a protocol.
Verification Engineer Interview Questions
2,558 verification engineer interview questions shared by candidates
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C++ encapsulation, inheritance and polymorphism
Nothing was unexpected, very minimal behavioral questions. All the technical questions are regarding to computer architecture subjects.
ask the concept of virtual function, pure function in c++. Ask previous verification experience. An question about how to write a c program to judge whether a machine is big-endian or little-endian
Given read and write freq, how to calculate FIFO depth?
questions about OVM process
Tell me about yourself.
How to convert hexadecimal to decimal.
Draw a NAND using cmos gates
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