1) interrupt mask register (10 bits) - Each bit corresponds to 1 interrupt interrupt log register (10 bits ) - Each bit corresponds to 1 interrupt Interrupt mask register masks the interrupt from reaching the output pin i.e , the output pin shows 0 although theres an interrupt Interrupt log register logs the presence of interrupt , but the moment you do a read , the interrupt log reg bit goes to 0 . Best strategy to verify ?
Explain the I2C protocol
Describe the testbench you created for a particular project
Object overriding and overloading. Callbacks, mailboxes and semaphores
Exaplain about your project and entire data path of RISC V architecture
They asked me about my internship experience.
Discussed C++ Pointers. I was not expecting that topic. Also, Async Fifos, Dynamic Arrays in SV.
How do you connect UVM objects.
it was not that difficult.
Questions regarding STA mode and Transactor based Simulation Acceleration: How would you implement a transactor? Use SystemC or System Verilog and why? How will you communicate between the DUT and the transactor testbench? Explain the PCIe speedbridge interface and how would you debug it?
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