1.timeout function 2.AXi assertions 3.display through command line arguments
Verification Engineer Interview Questions
2,559 verification engineer interview questions shared by candidates
Basic technical questions on Software Testing , Questions on past work experience , domain knowledge check etc
what is setup and hold time?
What have you done since you've graduated?
Implement a memory allocation management
Asked some questions on C++, constraints, and basic UVM
basics on UVM and SV
Linked lists, pointers, arrays, registers, and more.
Questions were on digital design, FSM, waveform analysis, verilog coding with inter and intra delays, SVA, test bench scenario writing, CPU vs GPU and pipelining.
The hour-long interview was mostly about the current projects.
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