Questions on pipelining
Verification Design Engineer Interview Questions
953 verification design engineer interview questions shared by candidates
How would you verify a that a basic flip-flop works?
Describe your previous work experience
State machines, VHDL, basic logic and design.
Out of order processor, importance ILP (and it's advantages), Digital design (realizing basic gates with a MUX)
Technical Screening: Q: I was asked about basic programming questions like Leet Code (easy) but mostly based on array, hash-maps, strings and also resume discussion Full-Panel: Q: SystemVerilog constraints, fork-join, mailbox and semaphores based questions Q: Was asked to write scoreboard for a Asynchronous FIFO Q: Monitor and scoreboard code for an AXI write transaction (project based) Q: Resume based discussions Q: Some basic programming problems in language of preference
What is setup and hold time What is skew What is synchronous and asynchronous reset
Design a FSM to detect a certain sequence of numbers.
set up time, hold time
-Questions about cache coherency -Basic Verilog Questions -Questions about c++ and traversing trees
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