Technical questions about IC, I have been ask to love real problem, how I would approach this particular problem, often with not enough data, and ambitious situation. I referred to previous experience to overcome these questions.
Staff Design Engineer Interview Questions
105 staff design engineer interview questions shared by candidates
simple cache operations and verification methodology flow questions
Can we fix hold time violation by reducing clock frequency
They asked me to do structural analysis on a variety of scenarios and to show my work.
science related
What are techniques to extend the bandwidth of a CML differential pair.
Overall ok . Didn't any one question to be very difficult
Describe the most difficult thing you have had when doing a project in the past, how did you solve it.
what is casex and casez in verilog
They asked about a common source amplifier with degeneration, what is the gain with and without the degeneration resistor. For the second part of the same question the drain and the gate were tied together.
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