1st interviewer - Asked me about computer architecture, basic 5 stage pipeline, Cache coherency, virtual memory, how to deal with meta-stability, and some basic verilog questions. 2nd interviewer - asked me to write fibonacci series in any scripting language I like, some basic stuff as LIFO and FIFO, stack etc 3rd - interviewer - Nothing too technical but mostly asked about my verification experience in detail. Mostly wanted to know how well I know about verification methodology.
Tell me a hardest decision you have ever made?
Verilog environment, UVM, bLOCKING NON BLOCKING
Describe an algorithm to sell/buy stock at maximum profit.
Draw a circuit/ state flow diagram to detect a bit sequence.
Explain setup time, hold time, etc. with diagrams.
1. Constraint coding for specific scenarios. 2. UVm phasing
Definition of sta and pd design flow
Solving k-maps, coding latch vs flip flop in VHDL/verilog, problems in placement and routing, how to resolve layout issues like drc's
Knowledge of Coding (Not extensive- Basic) Where do you see yourself in next 5-10 years?
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