Write verilog module and test bench for 8bit counter and 4:1 MUX
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There are 7 bags of coins. only one bag has cons weighing 1.1gm each and rest 6 bags has coins weighing 1gm each. You are given a weighing machine and you've to weigh only once. How do you find out the bag having 1.1gm coins?
1) Explain recursion, DP, greedy techniques. 2) Write code to construct mirror of binary tree 3) Sieve program. 4) Basic digital Electronics questions Round 2:- MOSFET current equation and Moore Machine questions HR round:-- formality
Basic questions of analog electronics and finite state machines were asked.
Write verilog code for the 4 bit register? Develop a 3 input xor gate using 4:1 mux
STA, PD, Ananlog CMOS questions, questions on stacking etc. Were asked in the second round.
I was asked about computer architecture
what's the frequnecy you used for your design, how did you tested your design. Explain area speed trade off situation you met in your design
What makes you interested in this job?
They asked me few question on how to counter those faults in the assignment.
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