Delay the bus signal with BRAM.
Fpga Engineer Interview Questions
542 fpga engineer interview questions shared by candidates
Easy questions like write DFF etc.
You have a device connected with a I2C bus. You send the data to the FIFO inside this device. How can you let the master know about FIFO overflow?
Questions related to CDC and Verilog/VHDL. one behavioral question. Questions from the resume.
Reverse an array in-place
Previous experience and coding part
We talked about my own project and the possibilities for its development.
OOP concept . like drawing problem. design object to do that.
You are just asked for technical questions without any behavioral questions.
blocking, non blocking. timing analysis, FF, verilog...
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