Interview questions were on core electronics concepts. Digital electronics mainly
Digital Design Engineer Interview Questions
553 digital design engineer interview questions shared by candidates
they asked me about basic STA, Verilog code to the circuit, and edge triggering-based questions also had some questions on the number system.
Basic Verilog code questions, such as latch inferences, correct assignations (not mixing blocking/non blocking), FSM, etc
CDC and related concepts. Clock main issues, metastability, glitching, etc, and the possible solutions
what is racing condition in JK flip flop
write vhdl code for clock divider
Design a FSM, Verilog code semantics, ECO changes, Linting and logic equivalence, Processor peripherals, Logic question
draw a NAND/NOR gate; difference between flip-flop and latch, reduce delay
They stressed about FSM's multi clock designs as well as core code of your projects done in graduation.
Background about my former job, skills
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