Do you understand timing constraints. Asked a few questions about them.
Asic Engineer Interview Questions
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Basic FIFO and CDC questions
Gave a standard fifo design and told me to explain how i'll write testbench for that
design uvm driver
Explain POCV coefficient based calculation for an actual timing report.
Question asked: SV -> function can take fork_join?y/n ->to find the bit to represent 4069 = 2^(x) or log 2 base (32) ->Malloc() ->write a integer queue : rand int q[$]; -> task and functions UVM: Sequencer- Driver connection phasing name 3 base class related question
electronics the technical questions like find the output of flip-flops find the output at a specific clock cycle combinations of flip flops and mux simplifications of gates transmission gate problem basic electronics like temperature were given flipflops and interview time played a dominant role in the first round
State machine, gate level design
Explain Setup and hold for a latch.
Raised Cosine Filter; roll--off factor; 100 doors puzzle
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