What is multicycle path, what is CDC?
Asic Engineer Interview Questions
1,075 asic engineer interview questions shared by candidates
1. explain synthesis flow in ASIC 2. Explain STA and what tools do you use 3. significance of physically aware netlist over regular netlist 4. explain setup and hold time 5. how will you solve critical path problems using PT
Design sequence detector with logic circuit diagram
You are given 2 receiver antennae and one transmitter antenna. Describe what happens to the received signal when changing the distance between receivers (close and far apart).
Write the verilog of ROB on a paper.
Standard digital design questions: 1. FSM 2. Multiplier design/questions 3. sync vs async reset
Cache coherency, mapping techniques, metastability, cdc, synchronizers,
Basic electronics question - 2:1 Mux, truthtable, DFF, FPGA design flow
write assertions to verify the condition.
basic concept of pipeline state machine of sequence detector C program of a function about pattern replace
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