mux tree, FSM, Regions, NBA, DDR, Swapping of variables, crystal oscillator, full adder using 2x1 mux
Asic Design Engineer Interview Questions
710 asic design engineer interview questions shared by candidates
Most unexpected question is which part of your Ph.D work makes you proud the most.
Computer Architecture, Verilog
setup and hold time -implementing and gate using mux
setup time hold time, implement and gate using mux 2-1 and asynchronous fifo implementation and MIPS data path
How do you access a register and confirm it is 12 bit or not?
7. Dual port RAM operation (if read and write req to the same location at a time?)
6. STA concepts
ASIC and PNR flow
What was the biggest challenge you've met during your previous work?
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