Assume that a certain gate in a logic circuit is always stuck at 1. What test inputs would you need to determine that the logic gate is defective.
Asic Design Engineer Interview Questions
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What is the CMOS
what is clock uncertainty what is skew
Create a NAND gate using only 2:1 muxs.
Using only NAND gate to design some logic
After you design the hardware in Q1, try to design another hardware to show the index of the bits at the same time.
I was asked to create XOR gate using only NOR gates.
State machine for detecting the sequence 101011
1. Began with Introduce Yourself. 2. Resume Question: You mention the Boot and Fuse Controller in your project. Tell me about that. 3. Further questions about the importance of Fuse in SoC. 4. Shift Preference? Open to relocation? 5. Do you have any questions you want to ask? Moving to technical: 1. Design an XNOR gate using a 2:1 Mux 2. Design a 1 Sticky Register
Where do you see yourself in 5 years
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