Design a FSM to detect a certain sequence of numbers.
Verification Engineer Interview Questions
2,559 verification engineer interview questions shared by candidates
como voce se ve daqui 19 anos
basic digital design design ,pointers from c language ,basic verilog questions
State machines, VHDL, basic logic and design.
qustions asked in written test are based on the following topics 1.design of FSM 2. STA 3.design of some logic functions and reduction of logic functions face to face in interview are the questions given in the written test.
describe a project you worked on..
all technical questions about the projects on my resume
Questions like blocking assignment and non blocking assignment difference
what is your elevation pitch? Why should we hire you? explain the end to end test process?
How long were the iterations of each build? How many people on your team?
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