What is stuck at fault, transition fault, bridging fault?
Design Verification Interview Questions
1,114 design verification interview questions shared by candidates
How would you verify a that a basic flip-flop works?
Technical Screening: Q: I was asked about basic programming questions like Leet Code (easy) but mostly based on array, hash-maps, strings and also resume discussion Full-Panel: Q: SystemVerilog constraints, fork-join, mailbox and semaphores based questions Q: Was asked to write scoreboard for a Asynchronous FIFO Q: Monitor and scoreboard code for an AXI write transaction (project based) Q: Resume based discussions Q: Some basic programming problems in language of preference
What is setup and hold time What is skew What is synchronous and asynchronous reset
Design a FSM to detect a certain sequence of numbers.
como voce se ve daqui 19 anos
State machines, VHDL, basic logic and design.
all technical questions about the projects on my resume
Questions like blocking assignment and non blocking assignment difference
How long have you been doing design verification? How familiar are you with UVMF?
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